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A developer has demonstrated a version of the Project Oberon operating system running on RISC-V hardware, replacing the original RISC-5 architecture. This development highlights potential for broader hardware compatibility and open-source innovation in educational computing.

A developer has successfully ported the Project Oberon operating system to run on RISC-V hardware, replacing its original support for the RISC-5 processor. This achievement, shared via a Show HN post, demonstrates the system’s adaptability and opens the door for broader hardware experimentation and educational use.

The developer, whose identity is not publicly disclosed, posted on Hacker News that they managed to compile and run the Oberon system on a RISC-V processor, a popular open-source instruction set architecture. The port involved adapting the system’s low-level code to support RISC-V’s instruction set, which differs significantly from the original RISC-5 architecture used in the Oberon hardware platform.

According to the post, the port is currently functional for core system components, including the GUI and basic file management, though some peripheral support remains experimental. The developer emphasized that this is a proof of concept, not a fully optimized or production-ready system. They also noted that the source code and build instructions are available publicly, inviting others to experiment and improve the port.

At a glance
updateWhen: announced March 2024
The developmentA developer shared a Show HN post showing a functional port of the Project Oberon system on RISC-V architecture, replacing the original RISC-5 processor support.

Potential Impact on Open-Source and Educational Computing

This development matters because Project Oberon is a historically significant operating system and programming environment created by Niklaus Wirth and colleagues at ETH Zurich. Porting it to RISC-V — an open-source architecture gaining traction worldwide — could make Oberon more accessible for educational purposes and hardware experimentation. It also demonstrates the flexibility of Oberon’s design and the potential for legacy systems to evolve alongside modern open hardware platforms.

Furthermore, this port could inspire similar efforts to adapt other specialized or educational operating systems to RISC-V, fostering innovation and open-source collaboration in the computing community.

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RISC-V development board

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Background on Project Oberon and RISC-V Compatibility Efforts

Project Oberon was developed in the 1980s as both an operating system and a programming language environment, primarily for educational use. Its design emphasizes simplicity and efficiency, and it was originally built for custom hardware based on the RISC-5 processor. Over the years, Oberon has been maintained and adapted primarily for modern x86 and ARM hardware, but support for other architectures has been limited.

Meanwhile, RISC-V has emerged as a prominent open-source instruction set architecture, supported by a broad community and industry players. Its modular design allows for custom implementations, making it attractive for educational, research, and hobbyist projects. Efforts to port legacy or niche operating systems to RISC-V have been ongoing, but a full port of Oberon has not been previously documented publicly.

The recent Show HN post marks a notable milestone in this ongoing effort, showcasing that Oberon can run on RISC-V hardware, at least in a proof-of-concept stage.

“Porting Oberon to RISC-V was challenging but feasible. The core system runs, and it opens many possibilities for experimentation.”

— Developer who posted on Hacker News

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Project Oberon operating system

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Extent of System Stability and Peripheral Support

It is not yet clear how stable or complete the RISC-V port of Oberon is. The developer indicated that core functionalities are working, but peripheral device support and system stability under prolonged use remain unverified. Further testing and community contributions are needed to assess its readiness for wider use.

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open-source RISC-V processor

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Next Steps for Development and Community Involvement

Further development will likely focus on improving peripheral support, system stability, and performance optimization. The developer has made the source code publicly available, encouraging others to contribute. Additional testing on different RISC-V hardware platforms is expected, along with potential integration into educational tools and projects.

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RISC-V compatible hardware

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Key Questions

What is Project Oberon?

Project Oberon is an operating system and programming environment developed in the 1980s for educational use, emphasizing simplicity and efficiency, originally designed for custom hardware based on the RISC-5 processor.

Why port Oberon to RISC-V?

Porting Oberon to RISC-V allows the system to run on open-source hardware, making it more accessible for education, experimentation, and preservation of legacy software in a modern, open architecture.

Is the RISC-V port fully functional?

The port is currently a proof of concept, with core system components working. Peripheral support and stability are still under development, and further testing is needed.

Will this port be available for public use?

Yes, the source code and build instructions are publicly available, inviting community contributions and experimentation.

What are the implications for educational computing?

This port could enable more accessible, open-source educational systems based on RISC-V hardware, fostering learning and innovation in computer science.

Source: hn

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